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  rev. 1.0 5/13 copyright ? 2013 by silicon laboratories si4825 this information applies to a product under dev elopment. its characteristics and specifications are s ubject to change without n otice. SI4825-A10 b roadcast m echanical t uning am/fm/sw r adio r eceiver features applications description the si4825 is the entry level mechanic al-tuned digital cmos am/fm/sw radio receiver ic that integrates the complete receiver function from antenna input to audio output. the si4825 extends silicon laboratories multi-band tuner family, and further increases the ease and attractiveness of design radio reception to audio devices through small size and boar d area, minimum component count, and superior, proven performance. the si4825 requires a simple application circuit and removes any requirements for manually tuning components during the manufacturing process. the receiver has very low power consumption, runs off two aaa batteries, and delivers the perfor mance benefits of digital tuning to the analog radio market. functional block diagram ? worldwide fm band support (64?109 mhz) ? worldwide am band support (504?1750 khz) ? sw band support (2.3?28.5 mhz) ? no manual alignment necessary ? mono audio output ? selectable support am/fm/sw regional bands ? enhanced fm/sw band coverage ? automatic frequency control (afc) ? integrated ldo regulator ? 2.0 to 3.6 v supply voltage ? wide range of ferrite loop sticks and air loop antennas supported ? 16-pin soic ? rohs-compliant ? direct volume control ? not en55020 compliant* *note: for consumer applications that require en 55020 compliance, use si483x. ? table and portable radios ? mini/micro systems ? cd/dvd players ? boom boxes ? modules ? clock radios ? mini hifi ? entertainment systems si4830/34 adc adc dsp dac aout afc si4825 rfgnd lna ami agc reg vdd 2.0~3.6v xtal osc fmi 0/90 am ant fm ant control interface tune1/2 band xtali rst adc lna_en vol+/- this product, its features, and/or its architecture is covered by one or more of the following patents, as well as other patents, pending and issued, both foreign and domestic: 7,127,217; 7,272,373; 7,27 2,375; 7,321,324; 7,355,476; 7,42 6,376; 7,471,940; 7,339,503; 7,339,504. ordering information: see page 14. pin assignments SI4825-A10 (soic) fmi rfgnd ami band tune2 tune1 lna_en nc rst aout gnd vdd vol- vol+ xtalo xtali 1 2 3 4 5 6 7 8 9 10 11 12 16 15 14 13
SI4825-A10 2 rev. 1.0
SI4825-A10 rev. 1.0 3 t able of c ontents section page 1. electrical specificat ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.1. overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.2. fm receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3. am receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4. sw receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 4.5. frequency tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6. band select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 4.7. volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.8. reset, powerup, and powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5. pin descriptions: SI4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6. ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7. package outline: si 4825-a10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8. pcb land pattern: SI4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9. top marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9.1. SI4825-A10 top marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 9.2. top marking explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 10. additional reference resour ces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
SI4825-A10 4 rev. 1.0 1. electrical specifications table 1. recommended operating conditions 1,2 parameter symbol test condition min typ max unit supply voltage 3 v dd 2?3.6v power supply powe rup rise time v ddrise 10 ? ? s ambient temperature range t a 02570c note: 1. typical values in the data sheet apply at v dd = 3.3 v and 25 c unless otherwise stated. 2. all minimum and maximum specifications in the data s heet apply across the recommended operating conditions for minimum v dd = 2.7 v. 3. operation at minimum v dd is guaranteed by characterization when v dd voltage is ramped down to 2.0 v. part initialization may become unresponsive below 2.3 v. table 2. dc characteristics (v dd = 2.7 to 3.6 v, t a = 0 to 70 c) parameter symbol test condition min typ max unit fm mode supply current * i fm ?20.0?ma am/sw mode supply current * i am ?19.0?ma supplies and interface v dd powerdown current i ddpd ?10? a *note: specifications are guaran teed by characterization.
SI4825-A10 rev. 1.0 5 figure 1. reset timing table 3. reset timing characteristics (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol min typ max unit rstb pulse width t prst 100 ? ? s vdd valid time before rstb rises t srst 100 ? ? s rstb low time before vdd becomes invalid t rrst 0??s notes: 1. rstb must be held low for at least 100 s after the voltage supply has been ramped up. 2. rstb needs to be asserted (pulled low) prior to the supply voltage being ramped down. rstb vdd t srst t prst t rrst
SI4825-A10 6 rev. 1.0 table 4. fm receiver characteristics 1,2 (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol test condition min typ max unit input frequency f rf 64 ? 109 mhz sensitivity with headphone network 3 (s+n)/n = 26 db ? 4.0 ? v emf lna input resistance 4,5 ?4? k ? lna input capacitance 4,5 ?5? pf am suppression 4,5,6,7 m = 0.3 ? 50 ? db input ip3 4,8 ? 105 ? dbv emf adjacent channel selectivity 4 200 khz ? 45 ? db alternate channel selectivity 4 400 khz ? 60 ? db audio output voltage 5,6,7 ?72?mv rms audio mono s/n 5,6,7,9,10 ?45? db audio frequency response low 4 ?3 db ? ? 30 hz audio frequency response high 4 ?3 db 15 ? ? khz audio thd 6,5,11 ?0.10.5 % audio output load resistance 4,10 r l single-ended 10 ? ? k ? audio output load capacitance 4,10 c l single-ended ? ? 50 pf notes: 1. additional testing information is available in ?an5 69: si4831/35/36/20/24/25-dem o board test procedure.? volume = maximum for all tests. tested at rf = 98.1 mhz. 2. to ensure proper operation and receiver performance, follow the guidelines in ?an738: si4825/36-a antenna, schematic, layout, and design guidelines.? silicon l aboratories will evaluate schematics and layouts for qualified customers. 3. frequency is 64~109 mhz. 4. guaranteed by characterization. 5. v emf =1 mv. 6. f mod = 1 khz, mono, and l = r unless noted otherwise. 7. ? f = 22.5 khz. 8. |f 2 ? f 1 | > 2 mhz, f 0 =2xf 1 ? f 2 . 9. b af = 300 hz to 15 khz, a-weighted. 10. at a out pin. 11. ? f = 75 khz.
SI4825-A10 rev. 1.0 7 table 5. am/sw receiver characteristics 1, 2 (v dd = 2.7 to 3.6 v, ta = 0 to 70 c) parameter symbol test condition min typ max unit input frequency f rf medium wave (am) 504 ? 1750 khz short wave (sw) 2.3 ? 28.5 mhz sensitivity 3,4,5 (s+n)/n = 26 db ? 30 ? v emf large signal voltage handling 5 thd < 8% ? 300 ? mv rms power supply rejection ratio 5 ? v dd =100 mv rms , 100 hz ? 40 ? db audio output voltage 3,6 ? 54 ? mv rms audio s/n 3,4,6 ? 45 ? db audio thd 3,6 ? 0.1 ? % antenna inductance 5,7 180 ? 450 h notes: 1. additional testing information is available in ?an569 : si4831/35/36/20/24/25-demo board test procedure.? volume = maximum for all tests. tested at rf = 6 mhz. 2. to ensure proper operation and receiver performance, follow the guidelines in ?an738: si4825/36-a antenna, schematic, layout, and design guidelines.? silicon laborato ries will evaluate schematics and layouts for qualified customers. 3. fmod = 1 khz, 30% modulation, 2 khz channel filter. 4. b af = 300 hz to 15 khz, a-weighted. 5. guaranteed by characterization. 6. v in =5mvrms. 7. stray capacitance on antenna and board must be < 10 pf to achieve full tuning range at higher inductance levels. table 6. reference clock and crystal characteristics (v dd = 2.7 to 3.6 v, t a = 0 to 70 c) parameter symbol test condition min typ max unit reference clock xtali supported reference clock frequencies ? 32.768 ? khz reference clock frequency tolerance for xtali ?100 ? 100 ppm crystal oscillator crystal oscillator frequency ? 32.768 ? khz crystal frequency tolerance ?100 ? 100 ppm board capacitance ??3.5pf
SI4825-A10 8 rev. 1.0 table 7. thermal conditions parameter symbol min typ max unit thermal resistance* ? ja ?80?c/w ambient temperature t a 02570c junction temperature t j ??77c *note: thermal resistance assumes a multi-layer pcb with the exposed pad soldered to a topside pcb pad. table 8. absolute maximum ratings 1,2 parameter symbol value unit supply voltage v dd ?0.5 to 5.8 v input current 3 i in 10 ma operating temperature t op ?40 to 95 ? c storage temperature t stg ?55 to 150 ? c rf input level 4 0.4 v pk notes: 1. permanent device damage may occur if the above absolu te maximum ratings are exceeded. functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. exposure beyond recommended operating conditions for extended periods may affect device reliability. 2. the si4825 devices are high-performance rf integrated circuits with certain pins having an esd rating of < 2 kv hbm. handling and assembly of these devices should only be done at esd-protected workstations. 3. for input pins rst , vol+, vol?, xtalo, xtali, band, tune2, tune1, lna_en. 4. at rf input pins, fmi and ami.
SI4825-A10 rev. 1.0 9 2. typical application schematic notes: 1. place c 4 close to v dd and gnd pins. 2. pin 15 gnd connects directly to gnd plane on pcb. 3. pin 5 leave floating. 4. to ensure proper operation and receiver performance, follow the guidelines in "an738: si4825/36-a antenna, schematic, layout, and design guidelines." silicon labs will evaluate the schematics and layouts for qualified customers. 5. pin 6 connects to the fm antenna interface and pin 8 connects to the am antenna interface. 6. place si4825 as close as possible to antenna jack and ke ep the fmi and ami traces as short as possible. 7. recommend keeping the am ferrite loop antenna at least 5 cm away from the tuner chip. 8. keep the am ferrite loop antenna at least 5 cm away fr om mcu, audio amp, and other circuits which have am interference. 9. place the transformer t1 away from any sources of interf erence and even away from the i/o signals of the si4825.   
  
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SI4825-A10 10 rev. 1.0 3. bill of materials table 9. si4825-a bill of materials component(s) value/description supplier c1 reset capacitor 0.1 f, 20%, z5u/x7r murata c4 supply bypass capacitor, 0.1 f, 20%, z5u/x7r murata c5 coupling capacitor, 0.47 f, 20%, z5u/x7r venkel b1 ferrite bead 2.5 k/100 mhz murata vr1 variable resistor (pot), 100 k ? , 10% kennon r1 reset timing resistor, 100 k ? , 5% venkel r3 resistor, 133 k ? , 1%, venkel r4 resistor, 160 k ? , 1% venkel r5 resistor, 67 k ? , 1% venkel r6 resistor,140 k ? , 1% venkel u1 si4825-a am/fm/sw analog tune analog display radio tuner silicon laboratories s1 band switch any, depends on customer ant1 ferrite stick,180-450 h jiaxin optional components c2, c3 crystal load capacitors, 22 pf, 5%, cog (optional: for crystal oscillator option) venkel y1 32.768 khz crystal (optional: for cryst al oscillator option) epson or equiv- alent ant2 air loop antenna, 10?20 hvarious
SI4825-A10 rev. 1.0 11 4. functional description figure 2. si4825 functional block diagram 4.1. overview the si4825 is the entry level mechanical-tuned digital cmos am/fm/sw radio receiver ic that integrates the complete receiver function from antenna input to audio output. the si4825 extend s silicon laboratories multi- band tuner family, and further increases the ease and attractiveness of design radio reception to audio devices through small size and board area, minimum component count, and superior, proven performance. the si4825 requires a simple application circuit, and removes any requirements for manually tuning components during the manufacturing process. leveraging silicon laborator ies' proven and patented digital low intermediate frequency (low-if) receiver architecture, the si4825 delivers desired rf performance and interference rejection in am, fm, and sw bands. the high integration and complete system production test simplifies design-in, increases system quality, and improv es manufacturability. 4.2. fm receiver the si4825 integrates a low noise amplifier (lna) supporting the worldwide fm broadcast band (64 to 109 mhz) and the tv audio stations within the frequency range in china area are also supported. pre-emphasis and de-emphasis is a technique used by fm broadcasters to improve the signal-to-noise ratio of fm receivers by reducing the effects of high frequency interference and noise. when the fm signal is transmitted, a pre-emphasis filter is applied to accentuate the high audio frequencies. all fm receivers incorporate a de-emphasis filter which attenuates high frequencies to restore a flat frequency response. two time constants are used in various regions. the de- emphasis time constant can be chosen to be 50 or 75 s. si4830/34 adc adc dsp dac aout afc si4825 rfgnd lna ami agc reg vdd 2.0~3.6v xtal osc fmi 0/90 am ant fm ant control interface tune1/2 band xtali rst adc lna_en vol+/-
SI4825-A10 12 rev. 1.0 4.3. am receiver the highly integrated SI4825-A10 supports worldwide am band reception from 504 to 1750 khz with five sub- bands using a digital low-if architecture with a minimum number of external components and no manual alignment required. this patented architecture allows for high-precision filtering, offering excellent selectivity and snr with minimum variation across the am band. the si4825 supports the worldwide am band with five sub-bands. one of the bands is a universal am band (am4, 520?1730 khz) supporting both 9 khz and 10 khz channel spaces for all regional am standards of the world. similar to the fm receiver, the SI4825-A10 optimizes sensitivity and reje ction of strong interferers, allowing better reception of weak stations. to offer maximum flexibility, the receiver supports a wide range of ferrite loop sticks from 180?450 h. an air loop antenna is supported by using a transformer to increase the effective inductance from the air loop. using a 1:5 turn ratio inductor, the inductance is increased by 25 times and easily supports all typical am air loop antennas, which generally vary between 10 and 20 h. 4.4. sw receiver the si4825 supports 36 short wave (sw) band receptions from 2.3 to 28.5 mhz, 18 of which are meter wave band (narrow), and the rest of the sw bands are with wider frequency range that can be used in sw radio with 1 or 2 sw bands. si4825 supports extensive short wave features such as minimal discrete components and no factory adjustments. the si4825 supports using the fm antenna to capture short wave signals. 4.5. frequency tuning a valid channel can be found by tuning the potentiometer that is co nnected to the tune1 and tune2 pin of the SI4825-A10 chip. 4.6. band select the SI4825-A10 supports worldwide am band with five sub-bands, us/europe/japan/china fm band with five sub-bands, and sw band with 36 sub-bands. for details on band selection, refer to ?an738: si4825/36-a antenna, schematic, layout, and design guidelines." 4.7. volume control the si4825 not only allows customers to use the traditional pvr wheel vo lume control through an external speaker amplifier, it also supports direct digital volume control through pins 10 and pin 11 by using volume up and down buttons. refer to "an738: si4825/36-a antenna, schema tic, layout, and design guidelines." 4.8. reset, powerup, and powerdown setting the rstb pin low will di sable analog and digital circuitry, reset the registers to their default settings, and disable the bus. setting th e rstb pin high will bring the device out of reset. figure 1 shows typical reset, startup, and shutdown timings for the si4825. rstb must be held low (asserted) during any power supply transitions and kept asserted as specified in figure 1 after the power supplies are ramped up and stable. failure to assert rstb as indicated here may cause the device to malfunction and may result in permanent device damage. a powerdown mode is available to reduce power consumption when the part is idle. putting the device in powerdown mode will disable analog and digital circuitry while keeping the bus active.
SI4825-A10 rev. 1.0 13 5. pin descriptions: SI4825-A10 pin number(s) name description 1 lna_en enable sw external lna. 2 tune1 frequency tuning 3 tune2 frequency tuning 4 band band selection and de-emphasis selection 5 nc no connect. leave floating. 6 fmi fm rf inputs. fmi should be connected to the antenna trace. 7 rfgnd rf ground. connect to ground plane on pcb. 8 ami am rf input. ami should be connected to the am antenna. 9rst device reset (act ive low) input 10 vol+ volume button up 11 vol? volume button down 12 xtalo crystal oscillator output 13 xtali crystal oscillator input/ external reference clock input 14 vdd supply voltage. may be c onnected directly to battery. 15 gnd ground. connect to ground plane on pcb. 16 aout audio output fmi rfgnd ami band tune2 tune1 lna_en nc rst aout gnd vdd vol- vol+ xtalo xtali 1 2 3 4 5 6 7 8 9 10 11 12 16 15 14 13
SI4825-A10 14 rev. 1.0 6. ordering guide part number 1,2 description package type operating temperature/voltage SI4825-A10-cs am/fm/sw broadcast radio receiver 16l soic pb-free 0 to 70 c 2.0 to 3.6 v notes: 1. add an ?(r)? at the end of the device part number to denote tape and reel option. the devices will typically operate at 25 c with degraded specifications for v dd voltage ramped down to 2.0 v. 2. the -c suffix in the part number indicates consumer grade product. please visit www.silabs.com to get more information on product grade specifications.
SI4825-A10 rev. 1.0 15 7. package ou tline: SI4825-A10 the 16-pin soic illustrates the package details for the SI4825-A10. ta ble 10 lists the values for the dimensions shown in the illustration. figure 3. 16-pin soic ?
SI4825-A10 16 rev. 1.0 table 10. package dimensions dimension min max a ? 1.75 a1 0.10 0.25 a2 1.25 ? b 0.31 0.51 c 0.17 0.25 d 9.90 bsc e 6.00 bsc e1 3.90 bsc e 1.27 bsc l 0.40 1.27 l2 0.25 bsc h 0.25 0.50 0 8 aaa 0.10 bbb 0.20 ccc 0.10 ddd 0.25 notes: 1. all dimensions shown are in millim eters (mm) unless otherwise noted. 2. dimensioning and tolerancing per ansi y14.5m-1994. 3. this drawing conforms to the jedec solid state outline ms-012, variation ac. 4. recommended card reflow profile is per the jedec/ipc j-std-020 specification for small body components.
SI4825-A10 rev. 1.0 17 8. pcb land pattern: SI4825-A10 figure 4, ?pcb land pattern,? illustra tes the pcb land pattern details for the SI4825-A10-cs soic. table 11 lists the values for the dimensions shown in the illustration. figure 4. pcb land pattern table 11. pcb land pattern dimensions dimension feature (mm) c1 pad column spacing 5.40 e pad row pitch 1.27 x1 pad width 0.60 y1 pad length 1.55 notes: 1. this land pattern design is based on ipc-7351 pattern soic127p600x165-16n for density level b (median land protrusion). 2. all feature sizes shown are at maximum material condition (mmc) and a card fabrication tolerance of 0.05 mm is assumed. ?
SI4825-A10 18 rev. 1.0 9. top marking 9.1. SI4825-A10 top marking 9.2. top marking explanation mark method: laser pin 1 mark: mold dimple (bottom-left corner) font size: 0.71 mm (2.0 point) right-justified line 1 mark format: custom part number si4825a10 line 2 mark format: circle = 1.3 mm diameter yy = year ww = work week tttttt = manufacturing code ?e3? pb-free symbol assigned by the assembly house. corresponds to the year and work week of the mold date. manufacturing code from the assembly purchase order form.
SI4825-A10 rev. 1.0 19 10. additional reference resources contact your local sales representative s for more information or to obtain copies of the following references: ? an738: si4825/36-a antenna, schematic, layout, and design guidelines ? an569: si4831/35/36/20/24/25-demo board test procedure ? si4825-demo board user?s guide
SI4825-A10 20 rev. 1.0 d ocument c hange l ist revision 0.1 to revision 0.8 ? updated table 1, ?recommended operating conditions? ? updated table 2, "dc characteristics" ? updated table 4, "fm receiver characteristics" ? updated table 5, "am/sw receiver characteristics" ? updated section "4.3. am receiver" ? updated section "10. additional reference resources" ? section 5 "pin descriptions: SI4825-A10" revision 0.8 to revision 1.0 ? updated table 3. "reset timing characteristics" ? inserted section 4.8. "reset, powerup, and powerdown"
disclaimer silicon laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the silicon laboratories products. characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "typical" parameters provided can and do vary in different applications. application examples described herein are for illustrative purposes only. silicon laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. silicon laboratories shall have no liability for the consequences of use of the information supplied herein. this document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. the products must not be used within any life support system without the specific written consent of silicon laboratories. a "life support system" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. silicon laboratories products are generally not intended for military applications. silicon laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. trademark information silicon laboratories inc., silicon laboratories, silicon labs, silabs and the silicon labs logo, cmems?, efm, efm32, efr, energy micro, energy micro logo and combinations thereof, "the world?s most energy friendly microcontrollers", ember?, ezlink?, ezmac?, ezradio?, ezradiopro?, dspll?, isomodem ?, precision32?, proslic?, siphy?, usbxpress? and others are trademarks or registered trademarks of silicon laboratories inc. arm, cortex, cortex-m3 and thumb are trademarks or registered trademarks of arm holdings. keil is a registered trademark of arm limited. all other products or brand names mentioned herein are trademarks of their respective holders. http://www.silabs.com silicon laboratories inc. 400 west cesar chavez austin, tx 78701 usa smart. connected. energy-friendly products www.silabs.com/products quality www.silabs.com/quality support and community community.silabs.com


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